Application Scheduling and Optimization for Chip Multiprocessor (CMP) Architectures

Chip Multiprocessors (CMPs) represent an emerging trend in computer architecture. Programming and compiler support for chip multiprocessors (CMPs) will be increasingly important.. The focus of this project is to explore the ways of mapping and adapting the execution of an application and the underlying hardware to solve the performance and reliability challenges that will arise in CMPs.

In this project, we developed static and dynamic techniques for mapping application threads onto cores of a given chip multiprocessor (CMP) architecture. For static application mapping case, we designed two novel parallel formulations for the Barnes-Hut on the Cell Broadband Engine architecture by considering technical specifications and limitations of the Cell architecture. Our system for dynamic application mapping assigns application threads onto cores and maps the data they manipulate onto available on-chip memory components. In order to improve the performance of the application, the proposed framework repeats thread and data mapping, as necessary at runtime in order to reduce application execution latency. This framework uses four helper threads running in parallel with application threads, which dynamically observe the behavior of application threads and their data access patterns.

A novel metric called “Thread Vulnerability Factor (TVF)” was proposed and developed as part of this project in order to measure the reliability of multi-threaded applications. The TVF metric measures vulnerability of a thread against transient errors; and the TVF calculation for a given thread (which is typically one of the threads of a multithreaded application) does not depend on its code alone, but also on the codes of the threads that share resources and data with that thread. It can be employed in order to explore performance-reliability analysis of multi-threaded applications running on multicore architectures. Our TVF metric will provide a vital role in order to propose reliability-aware application mapping strategies.